VHDL Hello World Blink LED Program

Objective Learn main parts of a VHDL program that includes: Libraries/packages Entity...

Objective

  • Learn main parts of a VHDL program that includes:
    • Libraries/packages
    • Entity
    • Architecture
  • Design your first VHDL program that blinks/toggles an LED output every second
  • Learn creating testbench to verify hello world VHDL program
  • Learn to creating ModelSim and Lattice Diamond project for Hello World program

Example of library declaration

LIBRARY library_name;  — Double dash indicates comments

USE library_name.package_name.package_parts;

Usage example:

  Library ieee;

  USE ieee.std_logic_1164.all;    — Specifies the STD_LOGIC (8 levels) and the STD_ULOGIC (9 levels) multi-values logic systems

Entity overview

Defines the component name, its inputs and outputs (I/Os) and related declarations (such as generics used within the component).

Syntax:

       ENTITY entity_name IS

  PORT (

  port_name  : signal_mode  signal type;

  port_name  : signal_mode  signal type;

  ……….);

  END entity_name;

Hello world design problem

  • Design a VHDL program to blink/toggle an led every second where the clock input frequency from an oscillator is 1MHz.

Approach to solving this problem

  1. 1MHz clock means there are 1000000 square wave pulses within 1 second.  Period for each pulse is T=1/F = 1us.
  2. Simply count clk_1MHz pulses up to 1000000 for measuring 1 second time elapsed.
  3. Reset this counter upon reaching 1000000 pulse count.
  4. Pick any arbitrary value of the counter to set 1 second clock enable signal, indicating that 1 second has elapsed.
  5. Perform a synchronized toggle of the led output when clock enable signal is detected.

Summary and conclusions

  • You learned to create a basic synthesizable VHDL program and test and verify it in ModelSim and run it on Lattice MachXO3 FPGA
  • You learned basic structure of a VHDL program, including libraries, entity and architecture
  • You learned to design counter in VHDL
  • You learned to create synchronized clock enable signals
  • You learned about signals, processes
  • All source can be found on GitHub page for this course https://pro.tips/vhdl

Download source files

  1. helloworld.vhd
  2. helloworld_tb.vhd
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